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| NTD5867NL N-Channel Power MOSFET 60 V, 20 A, 39 mW Features * * * * Low RDS(on) High Current Capability 100% Avalanche Tested These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant Parameter Symbol VDSS VGS VGS TC = 25C Steady State TC = 100C TC = 25C PD IDM TJ, Tstg IS EAS ID Value 60 "20 "30 20 13 36 76 -55 to 150 20 18 W A C Unit V V V A http://onsemi.com V(BR)DSS 60 V RDS(on) MAX 39 mW @ 10 V 50 mW @ 4.5 V ID MAX 20 A 18 A MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Drain-to-Source Voltage Gate-to-Source Voltage - Continuous Gate-to-Source Voltage - Non-Repetitive (tp < 10 ms) Continuous Drain Current (RqJC) Power Dissipation (RqJC) Pulsed Drain Current D G S N-CHANNEL MOSFET 4 4 tp = 10 ms Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain-to-Source Avalanche Energy (VDD = 50 V, VGS = 10 V, RG = 25 W, IL(pk) = 19 A, L = 0.1 mH, TJ = 25C) Lead Temperature for Soldering Purposes (1/8 from case for 10 s) A mJ 12 3 1 TL 260 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. DPAK CASE 369AA (Surface Mount) STYLE 2 3 IPAK CASE 369D (Straight Lead) STYLE 2 2 THERMAL RESISTANCE MAXIMUM RATINGS Parameter Junction-to-Case (Drain) Junction-to-Ambient - Steady State (Note 1) Symbol RqJC RqJA Value 3.5 45 Unit C/W MARKING DIAGRAMS & PIN ASSIGNMENT 4 Drain YWW 58 67NLG 4 Drain YWW 58 67NLG 1 23 Gate Drain Source Publication Order Number: NTD5867NL/D 1. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces. 2 1 Drain 3 Gate Source Y = Year WW = Work Week 5867NL = Device Code G = Pb-Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. (c) Semiconductor Components Industries, LLC, 2010 March, 2010 - Rev. 0 1 NTD5867NL ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 2) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge Gate Resistance SWITCHING CHARACTERISTICS (Note 3) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD tRR ta tb QRR VGS = 0 V, dIs/dt = 100 A/ms, IS = 20 A VGS = 0 V, IS = 10 A TJ = 25C TJ = 100C 0.87 0.78 17 13 4.0 12 nC ns 1.2 V td(on) tr td(off) tf VGS = 10 V, VDD = 48 V, ID = 20 A, RG = 2.5 W 6.5 12.6 18.2 2.4 ns VGS(TH) VGS(TH)/TJ RDS(on) gFS Ciss Coss Crss QG(TOT) QG(TH) QGS QGD QG(TOT) RG VGS = 4.5 V, VDS = 48 V, ID = 20 A VGS = 10 V, VDS = 48 V, ID = 20 A VGS = 10 V, ID = 10 A VGS = 4.5 V, ID = 10 A VDS = 15 V, ID = 10 A CHARGES, CAPACITANCES AND GATE RESISTANCES 675 VGS = 0 V, f = 1.0 MHz, VDS = 25 V 68 47 15 1.0 2.2 4.3 7.6 1.3 nC W nC pF VGS = VDS, ID = 250 mA 1.5 1.8 5.2 26 33 8.0 39 50 S 2.5 V mV/C mW V(BR)DSS V(BR)DSS/TJ IDSS IGSS VGS = 0 V, VDS = 100 V TJ = 25C TJ = 125C VGS = 0 V, ID = 250 mA 60 60 1.0 100 100 nA V mV/C mA Symbol Test Condition Min Typ Max Unit VDS = 0 V, VGS = 20 V 2. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 3. Switching characteristics are independent of operating junction temperatures. ORDERING INFORMATION Order Number NTD5867NL-1G NTD5867NLT4G Package IPAK (Straight Lead) (Pb-Free) DPAK (Pb-Free) Shipping 75 Units / Rail 2500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 NTD5867NL TYPICAL PERFORMANCE CURVES 40 ID, DRAIN CURRENT (AMPS) 35 30 25 20 15 10 5 0 0 1 2 3 4 40 ID, DRAIN CURRENT (AMPS) 35 30 25 20 15 10 5 0 TJ = -55C 2 3 4 5 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) TJ = 125C TJ = 25C VDS 10 V 10V 4.5 V TJ = 25C 4V 3.8 V 3.6 V 3.4 V 3.2 V 3.0 V 2.8 V 5 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.060 ID = 20 A TJ = 25C 0.050 0.040 Figure 2. Transfer Characteristics TJ = 25C 0.035 VGS = 4.5 V 0.040 0.030 VGS = 10 V 0.025 0.030 0.020 3 4 5 6 7 8 9 10 0.020 5 10 15 20 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance vs. Gate-to-Source Voltage RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -50 -25 0 25 50 75 100 125 150 ID = 20 A VGS = 10 V IDSS, LEAKAGE (nA) 1000 10000 Figure 4. On-Resistance vs. Drain Current and Gate Voltage VGS = 0 V TJ = 150C 100 TJ = 125C 10 10 20 30 40 50 60 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Drain Voltage http://onsemi.com 3 NTD5867NL TYPICAL PERFORMANCE CURVES 1000 900 C, CAPACITANCE (pF) 800 700 600 500 400 300 200 100 0 0 Crss 10 20 30 40 50 60 DRAIN-TO-SOURCE VOLTAGE (VOLTS) Coss 10 8 VGS 6 4 2 0 0 Qgs Qgd VGS , GATE-TO-SOURCE VOLTAGE (VOLTS) VGS = 0 V TJ = 25C Ciss QT VDS = 48 V ID = 20 A TJ = 25C 5 10 15 QG, TOTAL GATE CHARGE (nC) Figure 7. Capacitance Variation Figure 8. Gate-To-Source Voltage vs. Total Charge 20 IS, SOURCE CURRENT (AMPS) VGS = 0 V TJ = 25C 15 1000 VDD = 48 V ID = 20 A VGS = 10 V tf td(off) tr t, TIME (ns) 100 10 10 td(on) 5 1 1 10 RG, GATE RESISTANCE (OHMS) 100 0 0.5 0.6 0.7 0.8 0.9 1.0 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation vs. Gate Resistance EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 100 I D, DRAIN CURRENT (AMPS) 10 ms 10 100 ms 1 ms 1 VGS = 10 V SINGLE PULSE TC = 25C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 100 10 ms dc 20 Figure 10. Diode Forward Voltage vs. Current ID = 20 A 15 10 5 0.1 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (C) Figure 11. Maximum Rated Forward Biased Safe Operating Area Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 4 NTD5867NL TYPICAL PERFORMANCE CURVES r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 10 1.0 D = 0.5 0.2 P(pk) 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.00001 0.01 0.000001 t2 DUTY CYCLE, D = t1/t2 0.0001 t, TIME (ms) 0.001 t1 RqJC(t) = r(t) RqJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RqJC(t) 0.01 0.1 Figure 13. Thermal Response http://onsemi.com 5 NTD5867NL PACKAGE DIMENSIONS DPAK (SINGLE GUAGE) CASE 369AA-01 ISSUE A -T- B V R 4 SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 --- 0.89 1.27 3.93 --- C E S A 1 2 3 Z H U F L D 2 PL J DIM A B C D E F H J L R S U V Z 0.13 (0.005) M T SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 NTD5867NL PACKAGE DIMENSIONS IPAK (STRAIGHT LEAD DPAK) CASE 369D-01 ISSUE B B V R 4 C E Z NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- S -T- SEATING PLANE A 1 2 3 K F D G 3 PL J H M 0.13 (0.005) T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 7 NTD5867NL/D |
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